发明名称 ANALOGUE DELAY LINE
摘要 PURPOSE:To correct the amplitude distortion and the phase distortion by cascadeconnecting an electric charge transfer element constituting an analogue delay line and a correcting circuit consisting of one delay element, which brings the delay corresponding to one stage of the electric charge transfer element, an amplifier and an adder.
申请公布号 JPS5435656(A) 申请公布日期 1979.03.15
申请号 JP19770102067 申请日期 1977.08.24
申请人 NIPPON ELECTRIC CO 发明人 FUSHIMI SHIGEO;SHIDA SEIYA;SATOU MASAO
分类号 H03H11/26;G06G7/12;G11C27/04 主分类号 H03H11/26
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