发明名称 METHOD FOR FORMING SELF-ALINING TYPE GATE STRUCTURE AROUND TIP PART OF COLD CATHODE EMITTER USING CHEMICAL/MECHANICAL POLISHING METHOD
摘要 <p>PURPOSE: To provide a manufacturing method of a self-aligning gate structure capable of obtaining a larger electron emission current produced by a lower electron emission threshold voltage when any emitter-gate voltage is velated. CONSTITUTION: An electron emission emitter 13, a dielectric layer 18, an insulating layer 14 and a conducting layer 15 are formed, and, if desired, a self-aligning grid structure surrounding the emitter 13 including a buffer layer is formed. First, the emitter 13 having a laminated material thereon is smoothed by a chemical and mechanical polishing method (CMP method). Next, the insulating layer 14, the dielectric layer 18 and the conducting layer 15 are selectively removed by etching or the like to expose at least one portion of the emitter 13. A leading end of the emitter 13 is sharpened by oxidation, and is covered with a material having a low work function value.</p>
申请公布号 JPH0684454(A) 申请公布日期 1994.03.25
申请号 JP19930047162 申请日期 1993.02.15
申请人 MICRON TECHNOL INC 发明人 TORANGU TEII DOON;JIEI BURETSUTO RORUFUSON;TAIRAA EI ROURII;DEIBITSUDO EI KIYASEI
分类号 H01J1/304;H01J9/02;H01L21/3105;(IPC1-7):H01J9/02 主分类号 H01J1/304
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