发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE: To provide a method of forming a metal silicide layer for conduction use on feature materials arranged closely to each other. CONSTITUTION: A method of manufacturing a semiconductor integrated circuit consists of a step for forming a plurality of feature materials 3, which are separately arranged, on a substrate 1, a step, in which a polysilicon layer 7 is formed on the surfaces of the materials 3 and a first conductive material layer is deposited on the layer 7 in a non-isotropic manner, a step, in which the first conductive material layer is etched to remain metal fins 11, a step for depositing a second conductive material layer 13 on a structure formed by the above step and a step for forming a conductive compound layer by heating the structure formed by the above step.
申请公布号 JPH0684906(A) 申请公布日期 1994.03.25
申请号 JP19920355405 申请日期 1992.12.21
申请人 AMERICAN TELEPH & TELEGR CO <ATT> 发明人 AJITSUTO MANOCHIYA;SARESHIYU EMU MAACHIYANTO;RANBAA SHIN
分类号 H01L21/28;H01L21/3205;H01L21/336;H01L21/768;H01L23/52;H01L29/78;(IPC1-7):H01L21/320;H01L29/784 主分类号 H01L21/28
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