| 摘要 |
PURPOSE: To draw in a PLL automatically at the time of respectively receiving a normal reproducing signal and a double speed reproducing signal and to read out the normal reproducing signal and the double speed reproducing signal. CONSTITUTION: An input signal from a DIN terminal is inputted to a phase difference detection circuit 2 and an integration circuit 10, and the output signal of the integration circuit 10 is inputted to a peak hold circuit 11. The signal of the peak hold circuit 11 and the signal of a reference voltage source 12 are inputted to a comparator 13. The phase difference detection circuit 2 is inputted with the input signal and the signal from a VCO 1 to output the signal according to a phase difference between the input signal and the oscillation signal of the VCO 1 to an LPF 9 with a switcher. The LPF 9 with the switcher is used switching two low-pass filters. The output signal of the comparator 13 is used as a switch signal. A PLL circuit is formed by the VCO 1, the phase difference detection circuit 2 and the LPF 9 with the switcher to output a master clock of a digital audio interface. |
