METHOD OF FUSE LAYOUT OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method is provide to reduce a chip size and increase a productivity by effectively forming a layout of signal line. CONSTITUTION: In the fuse layout of semiconductor device, if the signal corresponding to the defect word line is input, it generate the pulse which disables regular decoder so that it stops the regular word line from operating and makes only a residual word line to operate. Also, a address which can be used in common layouts alternately in one fuse box so that it reduces the number of signal line to a minimum. Thereby, it is possible to optimize layout of the signal line which has the same function and is extended to another block or bank so that it can reduce the total area for the cell.