Method of fabricating three-dimensional gate-all-around vertical gate structures and semiconductor devices, and three-dimensional gate-all-round vertical gate structures and semiconductor devices thereof

摘要

Present example embodiments relate generally to methods of fabricating a three-dimensional gate-all-around (GAA) vertical gate (VG) semiconductor structure comprising providing a substrate; forming a plurality of layers having alternating first insulative material layers and second insulative material layers over the substrate; identifying bit line and word line locations for the formation of bit lines and word lines; removing at least a portion of the plurality of layers outside of the identified bit line and word line locations, each of the removed portions extending through the plurality of layers to at least a top surface of the substrate; forming a vertical first insulative material structure in the removed portions; performing an isotropic etching process to remove the second insulative material from the second insulative material layers; forming bit lines in the second insulative material layers within the identified bit line locations; and forming word lines in the identified word line locations.

主权项

1. A method of fabricating a three-dimensional vertical gate (VG) semiconductor structure, the method comprising:
providing a substrate; forming a plurality of layers over the substrate, the plurality of layers having alternating first insulative material layers and second insulative material layers, the first and second insulative material layers formed by a deposition of first insulative material and second insulative material, respectively; identifying bit line and word line locations for the formation of bit lines and word lines; removing at least a portion of the plurality of layers outside of the identified bit line and word line locations, each of the removed portions extending through the plurality of layers to at least a top surface of the substrate; forming a vertical first insulative material structure in the removed portions; performing an isotropic etching process to remove the second insulative material from the second insulative material layers; forming bit lines in the second insulative material layers within the identified bit line locations; and forming word lines in the identified word line locations; wherein the vertical first insulative material structures are operable to provide support for the first insulative material layers remaining after the removing of the second insulative material from the second insulative material layers.