Non-Volatile Memory With Two Phased Programming

摘要

Programming non-volatile memory includes applying a series of programming pulses to the memory cells as part of a coarse/fine programming process. Between programming pulses, memory cells in the coarse phase are verified for a coarse phase verify level for a target data state and memory cells in the fine phase are verified for a fine phase verify level for the target data state, both in response to a single reference voltage applied on a common word line. For a memory cell in the coarse phase that has been verified to have reached the coarse phase verify level, the memory cell will be temporarily inhibited from programming for a next programming pulse and switched to the fine phase. For a memory cell in the fine phase that has been verified to have reached the fine phase verify level, the memory cell will be inhibited from further programming

主权项

1. An apparatus, comprising:
a plurality of memory cells; and one or more control circuits in communication with the memory cells, the one or more control circuits configured to apply a series of doses of programming to the memory cells, the one or more control circuits configured to sense a first subset of the memory cells for a first verify level for a target data state and sense a second subset of the memory cells for a second verify level for the target data state between doses of programming, for a memory cell sensed to have reached the first verify level the one or more control circuits are configured to temporarily inhibit programming for a subsequent dose of programming and add the memory cell to the second subset, for a memory cell sensed to have reached the second verify level the one or more control circuits are configured to inhibit further programming.