发明名称 MEMORY SYSTEM
摘要 PURPOSE:To achieve a quick memory access, by providing a means that holds an update address updated by a prescribed number for an accessing address at the previous memory accessing time in an interleave system. CONSTITUTION:When a memory board 1 is accessed, and a continuous access is performed following that, an address signal is supplied to a comparator 9 through an address line AL. The address signal is compared with the address signal whose address is increased by one at the previous accessing time, and latched, of a latch circuit 7. As a result, when those two address signals coincide, a latch output control signal LC4 is supplied to a latch circuit 4, and a data held in advance in the latch circuit 4 is outputted to a data line DL. In this way, the memory access can be made into high speed when a continuous address area is accessed, like at a DMA transfer time.
申请公布号 JPS62249246(A) 申请公布日期 1987.10.30
申请号 JP19860092012 申请日期 1986.04.23
申请人 HITACHI LTD 发明人 MIYASHITA KOICHI
分类号 G06F12/06;G06F12/00;G11C11/34 主分类号 G06F12/06
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