| 摘要 |
PURPOSE:To attain high speed decoding of a compression code data by applying parallel decoding to a compression code data by means of plural decoding circuits to which blocks split by split control circuit splitting the data to a prescribed block is sequentially assigned. CONSTITUTION:A split control circuit 2 splits a compression coding data 1 to a prescribed block number and a decoding circuit 4 consists of plural decoding circuits 4-1-4-n decoding the compression coding data 1. The compression coding data 1 received by the split control circuit 2 is split into a prescribed block number and assigned to an idle circuit of the decoding circuits 4-1-4-n and the assigned decoding circuits 4-1-4-n decode the compression code data 1 and the result is stored in a picture memory 5. That is, the compression coding data 1 is split and assigned sequentially to the plural decoding circuits 4-1-4-n, where the data is subject to parallel decode processing simultaneously. Thus, the compression code data is decoded at a high speed. |
