发明名称 |
MICROCOMPUTER HAVING P-ROM BUILT-IN |
摘要 |
<p>PURPOSE:To facilitate the analysis of the P-ROM data against the occurrence of a fault while keeping the security of secret to the outsiders for a microcomputer which contains a P-ROM having its verifying inhibition protection mode. CONSTITUTION:A microcomputer contains a protection information memory cell 2 consisting of a P-ROM cell, a protection decoder 20 which inputs and decodes the data on the cell 2, and an address modifying circuit 4 which modifies the address information on a P-ROM in a verifying mode of the P-ROM with the output signal of the decoder 20. The decoder 20 consists of a logic circuit which excludes the combination of two different types of data and becomes active only when the data except those combined data are inputted.</p> |
申请公布号 |
JPH0635805(A) |
申请公布日期 |
1994.02.10 |
申请号 |
JP19920185207 |
申请日期 |
1992.07.13 |
申请人 |
NEC IC MICROCOMPUT SYST LTD |
发明人 |
MAKII YOSHIAKI |
分类号 |
G06F12/14;G06F15/78;G06F21/02;H01L21/822;H01L21/8247;H01L27/04;H01L27/115;(IPC1-7):G06F12/14 |
主分类号 |
G06F12/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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