| 摘要 |
<p>PURPOSE: To set the delay time with fine resolution by connecting a series circuit consisting of a MOS transistor Tr and a capacitor between every stage of a logic element and a common potential point. CONSTITUTION: A series circuit consisting of a CMOS field effect Tr and a capacitor C is connected between every stage of a logic element LG and a common potential point. In such a constitution, a variable delay circuit 1 can continuously vary the delay time. Then the forward bias is applied to the gate electrode of the Tr that is connected in series to the capacitor C, and this forward bias voltage is changed. Thus the resistance value varies between the drain and the source of the Tr, and it is possible to secure an effect equivalent to that secured in a constitution where a variable resistor VR is connected in series to the capacitor C. Then the delay time caused by the element LG can be finely adjusted by the change of the resistance value of the resistor VR.</p> |
