发明名称 Method of packaging a plurality of devices utilizing a plurality of lead frames coupled together by rails
摘要 A method and arrangement for packaging a plurality of chip devices. The method includes providing a plurality of bottom leadframes coupled together with rails to form a bottom leadframe assembly and providing a plurality of top leadframes coupled together with rails to form a top leadframe assembly. Dies are placed between the top and bottom leadframes and the top and bottom leadframe assemblies are coupled to one another. The dies are attached to die attach pads of the bottom leadframes and are coupled to the top leadframes with solder bumps. A molded body is placed around the top and bottom leadframes with the dies therebetween and the rails are removed from the top and bottom leadframes, thus providing a plurality of chip devices.
申请公布号 US6762067(B1) 申请公布日期 2004.07.13
申请号 US20000487969 申请日期 2000.01.18
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 QUINONES MARIA CLEMENS Y.;BAJE GILMORE S.;ESTACIO MARIA CHRISTINA B.;GESTOLE MARVIN R.;LEDON OLIVER M.;MEPIEZA SANTOS E.
分类号 H01L23/48;H01L23/488;H01L23/495;(IPC1-7):H01L21/48;H01R43/00 主分类号 H01L23/48
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