Memory architecture permitting selection of die size after fabrication of active circuitry

摘要

A generic wafer includes memory units separated by scribe lanes. Memory chips of different storage capacities can be produced by connecting different numbers of memory units on the generic wafer by forming one or more interconnect layers specialized according to a desired storage capacity and cutting the wafer using a sawing pattern according to the desired storage capacity. The specialized layer can be formed using different mask sets that form a different conductive pattern for each storage capacity or by forming a generic interconnect structure with fuses that are cut to select the storage capacity of the memory chips. <IMAGE>