发明名称 Verifying proximity of ground metal to signal traces in an integrated circuit
摘要 Techniques are disclosed for verifying the proximity of signal return paths (e.g., ground metal or power) to signal traces in an integrated circuit package design. A package designer creates the package design using a package design tool. A proximity verifier verifies that there is a signal return path within a predetermined threshold distance of each specified signal trace in the package layers directly above and/or below the signal trace. The proximity verifier may notify the package designer of any signal traces which are not sufficiently close to signal return paths, such as by providing visual indications of such signal traces in a graphical representation of the package design. In response, the package designer may modify the package model to ensure that all signal traces are sufficiently close to signal return paths.
申请公布号 US6769102(B2) 申请公布日期 2004.07.27
申请号 US20020199127 申请日期 2002.07.19
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY 发明人 FRANK MARK D.;NELSON JERIMY;MOLDAUER PETER SHAW
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址