发明名称 GAAS INTEGRATED CIRCUIT AND ITS MANUFACTURE
摘要 PURPOSE: To obtain a GaAs heterojunction field-effect transistor HFET in an integrated circuit by realizing a precise etching of a wafer for forming an enhancement HFET by an etching stop layer thereby obtaining an HFET structure where an essentially flat reliable metal part of a wafer can be formed. CONSTITUTION: A buffer layer 4 of a compound semiconductor material having a first band gap energy is grown and then followed by the growth of a first spacer layer 5 of a compound semiconductor material having a second band gap energy and a dope layer 6 of a compound semiconductor material having a second band gap energy. Subsequently, a first cap layer 8 of a compound semiconductor material having a first band gap energy is grown and then followed by the growth of an etch stop layer 9 of a compound semiconductor material having a third band gap energy and a second cap layer 10 of a compound semiconductor material having a first band gap energy. This method realizes a novel process for fabricating both enhancement and depletion HFETs having a constant threshold voltage and a self-alignment structure over the entire wafer.
申请公布号 JPH02205362(A) 申请公布日期 1990.08.15
申请号 JP19890218764 申请日期 1989.08.28
申请人 AMERICAN TELEPH & TELEGR CO <ATT> 发明人 RICHIYAADO II AARENZU;ARUBAATO JIYOOJI BAKA;RANDORUFU ETSUCHI BAATON;MAIKERU FUIRITSUPU AIANNATSUZUI;ARETSUKUSU RAHABU;SHINNSHIEMU PEI;KURAUDO RUISU REINORUZU JIYUNIYA;SHIIHONNHA BUON
分类号 H01L29/80;H01L21/20;H01L21/338;H01L21/76;H01L21/8252;H01L29/778;H01L29/812 主分类号 H01L29/80
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