| 摘要 |
<p>PURPOSE:To detect the end of writing operation without placing any load on a microprocessor by providing a control circuit which indicates reading operation during the writing operation and a detecting circuit which detects input/ output terminals from being released from a high-output-impedance state in response to the indication. CONSTITUTION:The memory device includes the control circuit 30 which indicates data reading operation to an EEPROM(Electrically Erasable and Programmable Read-Only Memory) 2 while data are rewritten in a memory cell array and the detecting circuit 31 which detects whether or not the high- output-impedance states of the data input/output terminals D0 - D5 are released in response to the operation of the reading operation by the control circuit 30. Then the control circuit 30 and detecting circuit 31 reports the end of the writing operation through hardware without data polling by a microprocessor 1. Consequently, the end of the writing operation can be detected without placing any load on the microprocessor 1.</p> |
