发明名称 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a non-volatile semiconductor storage device that can reduce a leakage current on reading operation even if the threshold voltage of a memory cell is set to a lower value in erasure operation. SOLUTION: An N-type well 2 is formed on the surface of a P-type silicon substrate 1, and a plurality of P-type wells 4 that are electrically separated one another by a trench 3 are formed on the surface of the N-type well 2. A plurality of memory cells are formed on the P wells 4. Further, a P-type contact layer 5 that is connected to a bias circuit is formed on the surface of each P-type well 4. The bias circuit can selectively apply an inverse-bias voltage between the P-type well 4 and the P-type silicon substrate 1 where no N-type source diffusion layer 7 of a selection memory cell is included on reading operation.</p>
申请公布号 JPH11233743(A) 申请公布日期 1999.08.27
申请号 JP19980033036 申请日期 1998.02.16
申请人 TOSHIBA CORP 发明人 MORI SEIICHI
分类号 G11C16/02;G11C16/04;G11C16/16;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/115;H01L21/824 主分类号 G11C16/02
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