| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a method and device for reducing signal delays for a circuit design for reducing signal delays in an integrated circuit, etc., by adding minimum reguired circuits. SOLUTION: A buffer inserting means 5 and the gate multiplexing means 6 list the possibilities of buffer insertion and gate multiplexing in a target circuit. A solution set calculation means 7 calculates solution sets for combination of buffer insertion and gate multiplexing (such as wiring capacity and signal delay). An optimal solution selecting means 8 finds a configuration that achieves signal delay reduction required by adding minimum circuits from the combinations of buffer insertion and gate multiplexing, based on the circuit set results and selects a modified optimal circuit.</p> |
