发明名称 |
SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM |
摘要 |
<p>PROBLEM TO BE SOLVED: To reduce a chip occupying area by a circuit configuration for giving a voltage from a test external terminal to a memory cell at the time of screening by giving an output voltage from an internal power source voltage generator to the cell in a normal operating time state. SOLUTION: An external terminal VEXT directly led from a power source supply line VCM of a memory cell out of a chip is provided. And, an internal power source voltage generator VCMG has a function of an output terminal OUT to a high impedance state. Thus, an insertion of a MOS switch in series between the power source supply line of the cell, the internal power source voltage generator and a testing external terminal is not required. No voltage drop occurs at the switch. And, a chip occupying area of the circuit for giving an operating power to the cell can be reduced.</p> |
申请公布号 |
JPH11250669(A) |
申请公布日期 |
1999.09.17 |
申请号 |
JP19980046483 |
申请日期 |
1998.02.27 |
申请人 |
HITACHI LTD;HITACHI DEVICE ENG CO LTD |
发明人 |
KUSUNOKI TAKESHI;OHATA KENICHI;ARAKAWA FUMIHIKO;NANBU HIROAKI;KANETANI KAZUO;YAMAZAKI SU;HIGETA KEIICHI;NISHIYAMA MASAHIKO |
分类号 |
G11C11/413;(IPC1-7):G11C11/413 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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