Devices and method for testing power-on reset voltage

摘要

A system having a power on reset circuit including a voltage divide), a multiplexer coupled to two outputs of the voltage divider, a first comparator coupled to the multiplexer and a reference, a logic gate coupled to the first comparator, a second comparator coupled to one of the two outputs of the voltage divider, and an emulation gate coupled to the second comparator.

主权项

1. A system having a power on reset circuit, wherein the power on reset circuit comprises:
a voltage divider coupled to a supply voltage terminal that has a first output and a second output; a multiplexer having a first input coupled to the first output, a second input coupled to the second output, and an output; and a first comparator having a first input coupled to the output of the multiplexer, a second input coupled to a reference, and an output; a logic gate having a first input coupled to the output of the first comparator, a second input, and an output, wherein the output of the logic gate is a power on reset terminal that provides a power on reset signal; a second comparator having a first input coupled to the first output of the voltage divider, a second input coupled to the reference, and an output coupled to the second input of the logic gate; and an emulation gate having an input coupled to the output of the second comparator and an output, wherein the output of the emulation gate is a power on reset test terminal that provides a power on reset test signal.