发明名称 Clock controlling method and circuit
摘要 A clock control circuit comprises a control circuit 102 for outputting a control signal for adding or subtracting a phase to a reference clock, which is an input clock or a clock generated from the input clock, on each clock period of the reference clock, and a phase adjustment circuit 101 fed with the input clock and outputting an output clock having the phase adjusted to the reference clock.
申请公布号 US6791385(B2) 申请公布日期 2004.09.14
申请号 US20010910117 申请日期 2001.07.20
申请人 NEC ELECTRONICS CORPORATION 发明人 SAEKI TAKANORI
分类号 G06F1/06;G06F1/08;H03H17/06;H03K5/00;H03K5/13;H03K5/135;H03L7/00;H03L7/08;(IPC1-7):H03L7/00 主分类号 G06F1/06
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