BUS-TO-BUS BRIDGE FOR A MULTIPLE BUS INFORMATION HANDLING SYSTEM THAT OPTIMIZES DATA TRANSFERS BETWEEN A SYSTEM BUS AND A PERIPHERAL BUS

摘要

BUS-TO-BUS BRIDGE FOR A MULTIPLE BUS INFORMATION HANDLING SYSTEM THAT OPTIMIZES DATA TRANSFERS BETWEEN A SYSTEM BUS AND A PERIPHERAL BUS The present invention provides hardware logic within a host bridge that connects a system bus to a peripheral bus using PCI bus architecture or a peripheral bus that uses a bus architecture similar to PCI. The inventive hardware optimizes the speed at which data transfers are accomplished between the buses while translating the data transfers between the different architectures of the two buses.