发明名称 METHOD OF MANUFACTURING THREE-DIMENSIONAL METAL-INSULATOR-METAL CAPACITOR FOR DYNAMIC RANDOM ACCESS MEMORY(DRAM) AND FERROELECTRIC RANDOM ACCESS MEMORY(FERAM)
摘要 <P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a metal-insulator-metal(MIM) capacitor provided with an insulator having a high dielectric constant or a ferroelectric interelectrode film conformable to a double damascene modus. <P>SOLUTION: A method of integrating the MIM by the double damascene modus comprises the steps of: forming a first plane insulating layer 20 and depositing an etching stop layer 22 and a second insulating layer 24; etching a capacitor node contacts opening 1 against a substrate; and etching a first recess 2 against the etching stop layer 22. A conductive layer 26 is filled in the contacts opening and the first recess by using the double damascene modus. A second recess 3 is formed around the capacitor node contacts on the second insulating layer. A first conformation metal layer 28, an interelectrode dielectric layer 30 and a second metal layer 32 are deposited and simultaneously patterned to form a capacitor upward the node contacts. The second recess increases a capacitor area, while patterning the metal layer, resulting in decreased treatment step. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004274021(A) 申请公布日期 2004.09.30
申请号 JP20030339500 申请日期 2003.09.30
申请人 CHARTERED SEMICONDUCTOR MFG LTD 发明人 CHENG WEI-HUA;YEN DANIEL;TAKAHASHI KUNIHIKO;LEI MING;JOY THOMAS
分类号 H01L;H01L21/02;H01L21/768;H01L21/8242;H01L21/8246;H01L27/10;H01L27/105;H01L27/108;H01L27/115 主分类号 H01L
代理机构 代理人
主权项
地址