| 摘要 |
PROBLEM TO BE SOLVED: To restrain short channel effects even if the gate length is reduced and to control a threshold voltage by controlling the concentration distribution of impurities inside a channel region of a polycrystalline silicon TFT precisely. SOLUTION: A thin film transistor is formed on an insulating substrate 101 and has a semiconductor layer 105 which having a source region 108 of a first conductivity, a drain region 109 of a first conductivity and a channel region 110 located between the source region and the drain region, and a gate electrode 107 which controls conductivity of the channel region 110 and a gate insulating film 106 located between the semiconductor layer 105 and the gate electrode layer 107. The channel region 110 comprises a first semiconductor layer 103b doped with impurities of a second conductivity which is different from the first conductivity and a second semiconductor layer 104b located between the first semiconductor layer 103b and the gate insulating film 106. COPYRIGHT: (C)2005,JPO&NCIPI
|
