| 发明名称 | Digital phase locked loop for low jitter applications | ||
| 摘要 | A phase locked loop circuit is disclosed. The phase locked loop circuit includes a ring oscillator. The phase locked loop circuit also includes a digital path including a digital phase detector. The phase locked loop circuit further includes an analog path including a linear phase detector. Additionally, the phase locked loop circuit includes a feedback path connecting an output of the ring oscillator to an input of the digital path and an input of the analog path. The digital path and the analog path are parallel paths. The digital path provides a digital tuning signal the ring oscillator that digitally controls a frequency of the ring oscillator. The analog path provides an analog tuning signal the ring oscillator that continuously controls the frequency of the ring oscillator. | ||
| 申请公布号 | US9455728(B2) | 申请公布日期 | 2016.09.27 |
| 申请号 | US201414245374 | 申请日期 | 2014.04.04 |
| 申请人 | INTERNATIONAL BUSINESS MACHINES CORPORATION | 发明人 | Deng Jingdong;Ho Chung S.;Flye David;Jin Zhenrong;Malladi Ramana M. |
| 分类号 | H03L7/06;H03L7/099;H03L7/087;G06F17/50 | 主分类号 | H03L7/06 |
| 代理机构 | Roberts Mlotkowski Safran Cole & Calderon P.C. | 代理人 | Meyers Steven;Calderon Andrew M.;Roberts Mlotkowski Safran Cole & Calderon P.C. |
| 主权项 | 1. A phase locked loop circuit, comprising a ring oscillator; a digital path including a digital phase detector; an analog path including a linear phase detector; and a feedback path connecting an output of the ring oscillator to the digital path and to the analog path, wherein: the digital path and the analog path are parallel paths; the digital path provides a digital tuning signal to an input of the ring oscillator that digitally controls a frequency of the ring oscillator; and the analog path provides an analog tuning signal to the input of the ring oscillator that continuously controls the frequency of the ring oscillator. | ||
| 地址 | Armonk NY US | ||