发明名称 Data transmission circuit
摘要 A data transmission circuit includes a first data selection unit suitable for alternately outputting data of first and second input lines as first driving data in synchronization with a clock; a data delay unit suitable for generating first and second delay data by delaying the data of the first and second input lines in synchronization with the clock; a second data selection unit suitable for: alternately outputting the data of the first and second input lines as second driving data in synchronization with the clock during a first mode, and alternately outputting inverted first and second delay data, which are inverted from the first and second delay data, as the second driving data in synchronization with the clock during a second mode; a first driving unit suitable for driving an output line in response to the first driving data; and a second driving unit suitable for driving the output line in response to the second driving data.
申请公布号 US9455694(B2) 申请公布日期 2016.09.27
申请号 US201514798203 申请日期 2015.07.13
申请人 SK Hynix Inc. 发明人 Choi Jin-Woo;Jang Dong-Wook
分类号 H03K3/00;H03K5/135;H03K3/027;H03K5/00 主分类号 H03K3/00
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A data transmission circuit, comprising: a first data selection unit suitable for alternately outputting data of first and second input lines as first driving data in synchronization with a clock; a data delay unit suitable for generating first and second delay data by delaying the data of the first and second input lines in synchronization with the clock; a second data selection unit suitable for: alternately outputting the data of the first and second input lines as second driving data in synchronization with the clock during a first mode, and alternately outputting inverted first and second delay data, which are inverted from the first and second delay data, as the second driving data in synchronization with the clock during a second mode; a first driving unit suitable for driving an output line in response to the first driving data; and a second driving unit suitable for driving the output line response to the second driving data.
地址 Gyeonggi-do KR