APPARATUS AND METHOD OF EXECUTION UNIT FOR CALCULATING MULTIPLE ROUNDS OF A SKEIN HASHING ALGORITHM

摘要

An apparatus is described that includes an execution unit within an instruction pipeline. The execution unit has multiple stages of a circuit that includes a) and b) as follows: a) a first logic circuitry section having multiple mix logic sections each having: i) a first input to receive a first quad word and a second input to receive a second quad word; ii) an adder having a pair of inputs that are respectively coupled to the first and second inputs; iii) a rotator having a respective input coupled to the second input; iv) an XOR gate having a first input coupled to an output of the adder and a second input coupled to an output of the rotator. b) permute logic circuitry having inputs coupled to the respective adder and XOR gate outputs of the multiple mix logic sections.

主权项

1. A hardware processor comprising:
multiple mix logic circuitry sections, each section in parallel and comprising:
a first input to receive a first value and a second input to receive a second value, anda first output and a second output to output a first result and a second result of a mix operation on the first value and the second value according to a hashing algorithm; permute logic circuitry including parallel inputs coupled to the outputs of the multiple mix logic circuitry sections without passage through an additional mix logic circuitry section, and parallel outputs to output results of a permute operation on results of the multiple mix logic circuitry sections according to the hashing algorithm; and control circuitry to couple a first output and a second output of the parallel outputs of the permute logic circuitry to the first input and the second input of one of the multiple mix logic circuitry sections, without passage through an additional mix logic circuitry section, to calculate a hash output value based on input operand data.