Ultra-deep power-down mode for memory devices

摘要

A memory device includes a voltage regulator, whose output provides a voltage supply for various other components of the memory device, including a command user interface. The memory device is placed into an ultra-deep power-down mode by providing to the memory device a software command, which causes the output of the voltage regulator to be disabled. To bring the memory device out of the ultra-deep power-down mode, a chip select signal is provided to the memory device, which includes a wake-up circuit that remains powered on even when the memory device is in the ultra-deep power-down mode. Receipt of the chip select signal while the memory device is in the ultra-deep power-down mode causes the output of the voltage regulator to be enabled, thereby providing power to the components that were completely powered down.

主权项

1. A method comprising:
powering a first component included in a memory device at a first voltage level; providing, to a voltage regulator included in the memory device, power at the first voltage level; outputting, using the voltage regulator, power at a second voltage level; powering a second component included in the memory device at the second voltage level; receiving a first instruction at the memory device to go into a power-down mode; in response to receiving the instruction to go into the power-down mode, disabling power output by the voltage regulator; and while the first component remains powered on, powering down the second component by disabling power output by the voltage regulator.