Power management controller for integrated circuit

摘要

A power management controller (PMC) for resetting various voltage domains of an integrated circuit (IC) generates and transmits first and second voltage domain input signals to first and second voltage domains, respectively, and generates corresponding reset signals for resetting the first and second voltage domains. The PMC generates a first master reset signal indicative of resetting the first and second voltage domains when the first and second voltage domains are booting. The PMC generates a second master reset signal indicative of resetting the first and second voltage domains when the IC is in a functional mode. The PMC determines whether the first and second voltage domains are non-functional and if at least one is non-functional, then the PMC masks a respective one of the first and second reset signals.

主权项

1. A power management controller (PMC) connected to a memory and a plurality of voltage domains of an integrated circuit including first and second voltage domains, wherein the first and second voltage domains receive first and second voltage domain input signals, respectively, and wherein the memory receives a memory input signal, the PMC comprising:
first and second voltage regulators that receive first and second voltage regulator input signals, respectively, and generate the first and second voltage domain input signals, respectively; first and second voltage detectors, connected to the first and second voltage regulators, respectively, for receiving and monitoring the first and second voltage regulator input signals, respectively, and generating first and second voltage detector signals indicative of voltage levels of the first and second voltage regulator input signals, respectively; and a voltage controller connected to the first and second voltage regulators and the first and second voltage detectors, wherein the voltage controller is configured for:
receiving a set of input signals including the first and second voltage detector signals, first and second external power-on-reset (POR) signals indicative of resetting the first and second voltage domains, respectively, and first and second regulator status signals indicative of operational conditions of the first and second voltage regulators, respectively, andgenerating a master reset signal based on the set of input signals, wherein the master reset signal is indicative of resetting the first and second voltage domains.