Microelectronic packages having trench vias and methods for the manufacture thereof

摘要

Embodiments of a microelectronic package including at least one trench via are provided, as are embodiments of a method for fabricating such a microelectronic package. In one embodiment, the method includes the step of depositing a dielectric layer over a first microelectronic device having a plurality of contact pads, which are covered by the dielectric layer. A trench via is formed in the dielectric layer to expose the plurality of contact pads therethrough. The trench via is formed to include opposing crenulated sidewalls having a plurality of recesses therein. The plurality of contact pads exposed through the trench via are then sputter etched. A plurality of interconnect lines is formed over the dielectric layer, each of which is electrically coupled to a different one of the plurality of contact pads.

主权项

1. A method for fabricating a microelectronic package, comprising:
depositing a dielectric layer over a first microelectronic device having a plurality of contact pads, the dielectric layer covering the plurality of contact pads; forming a trench via in the dielectric layer exposing the plurality of contact pads therethrough, the trench via formed to include opposing crenulated sidewalls having a plurality of recesses interspersed with a plurality of elongated fingers; sputter etching the plurality of contact pads exposed through the trench via; and forming a plurality of interconnect lines over the dielectric layer each electrically coupled to a different one of the plurality of contact pads; wherein the plurality of elongated fingers have inner terminal ends terminating adjacent the plurality of contact pads, and wherein the inner terminal ends of the plurality of elongated fingers at least partially shield regions of the opposing crenulated sidewalls from deposition of particles dislodged from the plurality of contact pads during sputter etching.