发明名称 Method of fabricating a substrate with a via connection
摘要 A method of fabricating a substrate having a conductive layer on opposing sides, with the conductive layers interconnected by a conductive via. The inventive method uses a dielectric substrate having a conductive layer deposited or laminated onto one or both of the substrate's opposing surfaces. For the situation of a metal layer on one side of the substrate, a laser drill is used to drill blind vias through the dielectric, stopping at the substrate/conductive layer interface. An electrolytic plating process is used to fill the via by establishing an electrical connection to the conductive layer. A second conductive layer may be deposited or laminated to the other surface of the substrate. If the starting structure has a conductive layer on both sides of the substrate, the drill is controlled to bore through the upper conductive layer at a comparatively high power and then continue at a lower power through the substrate. The blind vias drilled through the upper conductive layer will be plated during the via filling stage, and may be planarized, if desired, to provide a planar surface between the filled via sites and the surrounding conductive layer.
申请公布号 US2002000037(A1) 申请公布日期 2002.01.03
申请号 US20010935378 申请日期 2001.08.22
申请人 CHOU WILLIAM T.;BEILIN SOLOMON;LEE MICHAEL G.;PETERS MICHAEL G.;WANG WEN-CHOU VINCENT 发明人 CHOU WILLIAM T.;BEILIN SOLOMON;LEE MICHAEL G.;PETERS MICHAEL G.;WANG WEN-CHOU VINCENT
分类号 H05K3/40;H05K3/00;H05K3/42;H05K3/46;(IPC1-7):H01K3/10;H05K3/02 主分类号 H05K3/40
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