| 摘要 |
The impedance of a wiring pattern can be controlled in an easy way. A multilayer type printed-wiring board 1 comprises a pair of inner layer substrates 6, 7, a pair of data transmission wire patterns 4, 5 arranged between the CPU module 2 and the memory modules 3, 3 formed on one of the surfaces of the inner layer substrates 6, 7, said memory modules 3, 3 operating as main memories, and a pair of prepreg layers 10, 11 on the data transmission patterns 4, 5. The insulating layers 6, 7, 10, 11 arranged on the opposite surfaces of the data transmission wire pattern 4, 5 show a variation in the relative dielectric constant not greater than ±4% relative to the value predetermined for the relative dielectric constant at 1 GHz and a variation in the height not greater than ±15% relative to the value predetermined for the height under the condition of 3sigma for the standard deviation sigma of normal distribution, whereas the data transmission wire patterns 4, 5 show a variation in the width not greater than ±5% relative to the value predetermined for the width and a variation in the height not greater than ±30% relative to the value predetermined for the height under the condition of 3sigma for the standard deviation sigma of normal distribution.
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