发明名称 |
Dual work function gate in CMOS device |
摘要 |
A transistor has a first silicon layer comprising a source region and a drain region separated by a channel region. A gate oxide is formed over the first silicon layer. A second silicon layer is formed over the gate oxide and comprises a dual work function gate. The dual work function gate may include p+ and n+ gate regions such that the transistor has different threshold voltages.
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申请公布号 |
US2006124975(A1) |
申请公布日期 |
2006.06.15 |
申请号 |
US20040008435 |
申请日期 |
2004.12.09 |
申请人 |
HONEYWELL INTERNATIONAL INC. |
发明人 |
FATHIMULLA MOHAMMED A. |
分类号 |
H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L29/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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