Semiconductor testing device

摘要

A wafer testing device in which a plurality of wafers can be tested simultaneously significantly reducing the time required for testing each chip. A prober is provided which receives a wafer to be tested. A probe card is coupled to the prober having a window through which a plurality of semiconductor memory chips on the wafer are observable. A plurality of probes are coupled to the periphery of the window in such a manner that the probes can be brought into contact with bonding pads on the plurality of semiconductor memory chips. A tester is connected to the probes which is capable of simultaneously testing each of the plurality of chips.