摘要 |
<p>The occurrence of low-density regions in conformal layers deposited between raised topographic features (for example, metal runners) on an integrated circuit is prevented or reduced by the inventive process. The low-density regions (termed "soft oxides" when the conformal layer is an oxide of silicon), are preferentially attacked by subsequent etching procedures and produce undesired trenches which interfere with subsequent processing. The inventive process forms spacers, or fillets (60), between the raised topographic features (15). Then a conformal layer (79), such as dielectric formed from TEOS, may be deposited without causing the formation of low-density regions.</p> |