| 发明名称 | Input/output circuit | ||
| 摘要 | A circuit includes a first power node, an output node, a driver transistor coupled between the first power node and the output node, and a contending circuit. The driver transistor is configured to be turned on responsive to an edge of a first type of an input signal and to be turned off responsive to an edge of a second type of the input signal. The driver transistor has a source, a drain, and a gate, and the source of the driver transistor is coupled with the first power node. The contending circuit includes a control circuit configured to generate a control signal based on a signal at a gate of the driver transistor; and a contending transistor between the drain of the driver transistor and a second voltage. The contending transistor has a gate configured to receive the control signal. | ||
| 申请公布号 | US9450573(B2) | 申请公布日期 | 2016.09.20 |
| 申请号 | US201514630934 | 申请日期 | 2015.02.25 |
| 申请人 | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. | 发明人 | Chern Chan-Hong;Huang Tsung-Ching;Lin Chih-Chang;Huang Ming-Chieh;Hsueh Fu-Lung |
| 分类号 | H03K5/13;H03K17/687;H03K5/1534;H03K5/00 | 主分类号 | H03K5/13 |
| 代理机构 | Hauptman Ham, LLP | 代理人 | Hauptman Ham, LLP |
| 主权项 | 1. A circuit, comprising: a first power node configured to carry a first voltage having a first voltage level; an output node; a driver transistor coupled between the first power node and the output node, the driver transistor being configured to be turned on responsive to an edge of a first type of an input signal and to be turned off responsive to an edge of a second type of the input signal, the driver transistor having a source, a drain, and a gate, the source of the driver transistor being coupled with the first power node; and a contending circuit, comprising: a control circuit configured to generate a control signal based on a signal at a gate of the driver transistor; anda contending transistor between the drain of the driver transistor and a second voltage, the contending transistor having a gate configured to receive the control signal, and the second voltage having a second voltage level, the second voltage level being less than the first voltage level if the signal at the output node rises responsive to the edge of the first type of the input signal, andthe second voltage level being greater than the first voltage level if the signal at the output node falls responsive to the edge of the first type of the input signal. | ||
| 地址 | TW | ||