发明名称 Circuits and methods for reducing supply sensitivity in a power amplifier
摘要 In one embodiment, the present disclosure includes a circuit comprising a first power amplifier stage having an input to receive an input signal, an output coupled to an output node, the first power amplifier stage receiving a time-varying power supply voltage. The circuit further includes a second power amplifier stage configured in parallel with the first power amplifier stage having an input to receive the input signal, an output coupled to the output node, the second power amplifier stage receiving the time-varying power supply voltage. A first gain of the first power amplifier stage decreases when the power supply voltage is in a first low voltage range, and a second gain of the second power amplifier stage compensates for the decreasing gain of the first power amplifier stage in the first low voltage range.
申请公布号 US9473081(B2) 申请公布日期 2016.10.18
申请号 US201414518967 申请日期 2014.10.20
申请人 QUALCOMM INCORPORATED 发明人 Scuderi Antonino;Hadjichristos Aristotele
分类号 H03F3/68;H03F3/19;H03F1/56;H03F3/21;H03F1/22;H03F3/193;H03F3/24;H03F3/72;H03G1/00;H03G3/00 主分类号 H03F3/68
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A circuit comprising: a first power amplifier stage having an input to receive an input signal, an output coupled to an output node, the first power amplifier stage receiving a time-varying power supply voltage; and a second power amplifier stage configured in parallel with the first power amplifier stage having an input to receive the input signal, an output coupled to the output node, the second power amplifier stage receiving the time-varying power supply voltage, wherein a first gain of the first power amplifier stage decreases when the time-varying power supply voltage is in a first low voltage range, and wherein a second gain of the second power amplifier stage compensates for the decreasing gain of the first power amplifier stage in the first low voltage range, and wherein the output of the first power amplifier stage is coupled to the output of the second power amplifier stage in a shunt configuration.
地址 San Diego CA US