SCHALTUNG ZUR ADRESSIERUNG EINES SPEICHERS.

摘要

The addressing is carried out via an address register (14), behind which is connected an address multiplexer (13). Its inputs (E1,2), coupled to a second register (15) and an increment generator (19). The second register stores a lower limit of an address region. Control inputs (S1,2) of the multiplexer are linked to a logic circuit (21). The logic circuit is coupled both to the first address register outputs and a third register (16) for storage of the lower address limit. If the contents of the first and third address registers are the same, the logic circuit switches the second register to the output (13a) of the multiplexer. On a content difference, it couples the increment generator to the multiplexer output.