| 摘要 |
PURPOSE:To reduce a chip size and to enhance the accuracy of pulse width control by constituting the voltage/pulse width conversion circuit in such a manner that the step of changing a pulse width modulating output signal can be varied in correspondence with its duty ratio without increasing the number of the circuit elements of this circuit. CONSTITUTION:This circuit has a logarithmic clock generator 65 which generates a logarithmic clock signal TCK from a reference frequency signal S12 and a counter 66 which counts this logarithmic clock signal TCK and outputs the digital value of plural bits. Further, the above-mentioned circuit has a D/A converter 67 which converts the above-mentioned digital value to an analog signal and a voltage comparator 64 which compares the output of the above-mentioned D/A converter 67 and the pulse width modulation control voltage and forms the pulse width modulating output signal having a prescribed duty ratio.
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