发明名称
摘要 PURPOSE:To enable speedy recovery from a power save state to an operating state by connecting a buffer to the output of a reference voltage generating circuit, connecting one terminal of the switch to the output of the buffer and connecting the other terminal of the switch to a low-order voltage. CONSTITUTION:A buffer 2 is connected to the output of a reference voltage circuit 1, and a constant current circuit 6 is connected to the output of that buffer 2. Then, one terminal of a switch 3 is connected to the output of the buffer 2, and the other terminal of the switch 3 is connected to a low-order power source 4. That switch 3 is connected so as to control its opening/closing at a power save signal input terminal 5. Thus, the speedy recovery from the power save state to the operating state is enabled, and power consumption can be reduced.
申请公布号 JP2833471(B2) 申请公布日期 1998.12.09
申请号 JP19940083787 申请日期 1994.03.31
申请人 NIPPON DENKI KK 发明人 ITO MASAATSU
分类号 H02J1/00;G05F3/30 主分类号 H02J1/00
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