发明名称 USER PROGRAMMABLE CIRCUIT FOR DATA PROCESSOR
摘要 PROBLEM TO BE SOLVED: To enable a user to correct a CPU instruction set in real time by preparing a plurality of function parts which execute a series of prescribed operations, a programmable circuit, a controller which decodes a current instruction and a communication element. SOLUTION: A self-timed scheduler includes the function parts and a scheduler controller 814, a schedule control bus 820 and a self-timed scheduler controller 816 in an input protocol to generate the relevant control bit which is connected to a control data bus. An instruction decoder 804 produces the execution request signals ExcReq to all function parts 802 to 812 for the execution cycle of each instruction. Every function part is activated, based on the generic control data control information which is outputted from the controller 814 via the bus 820. In an activation (unconditional) operation, every function part starts its operation based on the control information of the controller 814 and generates a verification answer signal after its operation is over.
申请公布号 JPH11154087(A) 申请公布日期 1999.06.08
申请号 JP19980262975 申请日期 1998.09.17
申请人 LG SEMICON CO LTD;COGENCY TECHNOL INC 发明人 PAVER NIGEL C;DAY PAUL
分类号 G06F9/30;G06F9/318;G06F9/38;(IPC1-7):G06F9/30 主分类号 G06F9/30
代理机构 代理人
主权项
地址