Shallow trench isolation structures in semiconductor device and method for manufacturing the same

摘要

Shallow trench isolation structures in a semiconductor device and a method for manufacturing the same. The method includes steps hereinafter. A substrate is provided with a pad oxide layer and a first patterned photoresist layer thereon. A first trench is formed in the substrate corresponding to the first patterned photoresist layer. A first dielectric layer is deposited in the first trench and on the substrate. A second patterned photoresist layer is provided to form an opening in the first dielectric layer and a second trench in the substrate corresponding to the second patterned photoresist layer. A second dielectric layer is deposited to cover the first trench and the second trench in the substrate and the first dielectric layer on the substrate. The second dielectric layer is removed by chemical-mechanical polishing until the first dielectric layer is exposed. The first dielectric layer on the substrate is selectively removed.

主权项

1. A method for manufacturing shallow trench isolation structures in a semiconductor device, comprising steps of:
providing a substrate with a pad oxide layer and a first patterned photoresist layer in sequence thereon; forming a first trench in said substrate corresponding to said first patterned photoresist layer; depositing a first dielectric layer in said first trench and on said substrate, respectively, after removing said first patterned photoresist layer; providing a second patterned photoresist layer to form an opening in said first dielectric layer and to form a second trench in said substrate corresponding to said second patterned photoresist layer; removing said second pattern photoresist layer and a portion of said first dielectric layer so as to expose a first dielectric layer sub-portion in said first trench; depositing a second dielectric layer covering the first dielectric layer sub-portion in said first trench and said first dielectric layer in said second trench and on said substrate; removing said second dielectric layer by chemical-mechanical polishing until said first dielectric layer is exposed; and selectively removing said first dielectric layer on said substrate; wherein said first trench has a larger surface area than said second trench and said first dielectric layer has a higher dielectric constant than said second dielectric layer.