| 摘要 |
A circuit for reducing leakage current in a processor of an electronic apparatus, the processor having a joint test action group (JTAG) test terminal, is disclosed, which includes an initialization test pin included in the JTAG test terminal; a reset pin of the processor; and a semiconductor device connected between the initialization test pin and the reset pin, wherein the initialization test pin, the reset pin, and the semiconductor device are arranged to enable forward current to flow from the initialization test pin to the reset pin through the semiconductor device.
|
