| 摘要 |
<p>PROBLEM TO BE SOLVED: To provied a signal generating circuit capable of reducing the power consumption of a signal generating circuit by a method wherein the unclear sensing in the initial sensing stage of a bit line sensing amplifier is avoided and a DC current which can be produced by an output driver and the charging/discharging current of an output load are reduced. SOLUTION: A 1st driving means 1 which drives a 1st output line LANG in response to 1st and 2nd control signals CNT1 and CNT2, a 2nd driving means 3 which drives a 2nd output line LAPG in response to the reverse signal /CNT1 of the1st control signal and the reverse signal/CNT2 of the 2nd control signal, an equalizing means 5 which is connected between the lst output line and the 2nd output line and equalizes the 1st output line and the 2nd output line with each other in response to a 3rd control signal CNT3 and a control signal generating means which generates the 1st and 2nd control signals and their reverse signals in response to predetermined 1st, 2nd and 3rd input signals are provided. With this constitution, the power consumption can be reduced by reducing a DC current which might be produced by an output driver and the charging/discharging current of an output load and, if the output signal is used as the enable signal of a bit line sensing amplifier, the unclear sensing in the initial sensing stage of the bit line sensing amplifier can be avoided.</p> |
