| 摘要 |
An IC memory device reduces the time required to complete operations for reading, writing, or erasing data continuously from the same sector address in plural memory chips by accomplishing said operations with a single command and sector address input operation. This IC memory device comprises a data control unit, a command control unit, and a serial clock signal generator. The data control unit handles command and data I/O operations between a data bus and the memory chips. The command control unit generates and applies a chip enable signal to each corresponding memory chip based on externally supplied command data. The serial clock signal generator generates an internal serial clock signal supplied to each memory chip based on an externally supplied serial clock signal. Data can thus be read, written, or erased continuously at the same sector address in plural memory chips with the operating command and sector address being input only once.
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