| 摘要 |
PROBLEM TO BE SOLVED: To provide an information processing technology capable of suppressing the occurrence of cache mistake in the case of using the same cache line of a cache memory in the case of accessing a plurality of different cache lines of a main memory. SOLUTION: In this information processing apparatus, an output program generation part 303 generates a load cache instruction, a cache hit decision instruction and a cache mistake processing instruction to be performed according to the result of decision to be made according to the cache hit decision instruction with respect to a memory access instruction included in an internal expression program output by an input program analyzing part 302. When a plurality of memory access instructions in which the cache lines of the cache memory to be used in the case of performing access to the plurality of different cache lines of a main memory are the same may be included in the internal expression program, the output program generation part 303 generates a mixing instruction for mixing the decision results of decision to be made according to the cache hit decision instruction into one, and outputs an output program 103 including them. COPYRIGHT: (C)2009,JPO&INPIT
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