发明名称 Electronic circuit, electronic apparatus, and authentication system
摘要 An electronic circuit includes: a plurality of RS latch circuits each configured to enter a metastable state in accordance with a clock signal input to the RS latch circuit; a determination circuit configured to determine whether an output of each of the RS latch circuits is a random number or a fixed number; and a selector configured to select whether to maintain the clock signal input to the RS latch circuit, to change the clock signal input to the RS latch circuit to another clock signal having a different frequency, or to input a clock signal for fixing a signal output from the RS latch circuit, as the clock signal input to the RS latch circuit, in accordance with a result determined by the determination circuit.
申请公布号 US9384682(B2) 申请公布日期 2016.07.05
申请号 US201414521616 申请日期 2014.10.23
申请人 FUJITSU LIMITED 发明人 Yamamoto Dai;Takenaka Masahiko
分类号 H04L9/08;G09C1/00;H03K3/037 主分类号 H04L9/08
代理机构 Staas & Halsey LLP 代理人 Staas & Halsey LLP
主权项 1. An electronic circuit comprising: a plurality of RS latch circuits each configured to enter a metastable state in accordance with a clock signal input to the RS latch circuit; a determination circuit configured to determine whether an output of each of the RS latch circuits is a random number or a fixed number; and a selector configured to select whether to maintain the clock signal input to the RS latch circuit, to change the clock signal input to the RS latch circuit to another clock signal having a different frequency, or to input a clock signal for fixing a signal output from the RS latch circuit, as the clock signal input to the RS latch circuit, in accordance with a result determined by the determination circuit.
地址 Kawasaki JP