SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To shorten a reading time when a defective cell exists in a main memory cell array and is replaced by a redundant memory cell to realize the high speed reading operation. SOLUTION: Reading potential nodes (VSA nodes 1 and 2) and reference potential nodes (VREF nodes 1 and 2) are equalized with each other in response to the rise of a signal HIT which detects a defective address and a reading time at the time of the redundant memory cell reading is reduced. Further, in a nonvolatile semiconductor memory device having an ATD circuit, a reading time at the time of the main memory cell reading is also reduced by setting the times for equalizing the reading potential nodes and the reference potential nodes with each other individually.