发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To facilitate precise positioning of a semiconductor chip in a bonding position or appearance inspection after positioning. SOLUTION: In a semiconductor integrated circuit device wherein the outside dimensions of a die pad 3 as chip placement portion are larger than the outside dimensions of the semiconductor chip 2, V-grooves (or projections) 22 are formed on part of suspending leads 4 for supporting the die pad at equal intervals. The V-grooves 22 are used as graduations during positioning or appearance inspection. Precise positioning of the semiconductor chip 2 or appearance inspection in an appearance inspection process subsequent to positioning is carried out by making good use of the V-grooves 22.
申请公布号 JP2002329830(A) 申请公布日期 2002.11.15
申请号 JP20020128666 申请日期 2002.04.30
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 KAJIWARA YUJIRO;SUZUKI KAZUNARI;TSUBOSAKI KUNIHIRO;SUZUKI HIROMICHI;MIYAKI YOSHINORI;NAITO TAKAHIRO;KAWAI SUEO
分类号 H01L23/50;H01L21/48;H01L21/52;H01L21/60;H01L23/495 主分类号 H01L23/50
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