发明名称 Phase locked loop
摘要 A phase locked loop has a voltage controlled oscillator with two tuning inputs. One tuning input can be supplied with a feedback signal via a frequency divider in a conventional phase locked loop. A frequency word, which is provided anyway for the purpose of setting the division ratio of the PLL and hence for the purpose of frequency preselection, is used not only to supply the frequency divider but also for compensatory tuning of frequency-determining components in the oscillator. The phase locked loop allows, particularly in inexpensive open loop modulation methods, a significant reduction in the frequency drift by virtue of a smaller or disappearing discrepancy in the tuning voltage in conjunction with a reduction in the memory effect of capacitors in loop filters using particularly simple circuitry measures.
申请公布号 US6924706(B2) 申请公布日期 2005.08.02
申请号 US20030705521 申请日期 2003.11.10
申请人 INFINEON TECHNOLOGIES AG 发明人 BALM BART;MEVISSEN WALTER
分类号 H03L7/099;H03L7/187;H03L7/189;(IPC1-7):H03L7/00 主分类号 H03L7/099
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